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Embracing Failure: Axioms and Future Directions of Intermittent Computing

Title: Embracing Failure: Axioms and Future Directions of Intermittent Computing

Speaker: Josiah Hester

Abstract: For decades, smart devices (i.e., wireless sensing and computing systems) have relied primarily on battery power. Yet, batteries are bulky, expensive, high-maintenance, and unsustainable for the next trillion devices. Instead of relying on energy stored in a battery, the past decade has seen new approaches enabling battery-free, energy-harvesting smart devices. These devices compute intermittently, losing power, harvesting energy, restoring computational state, and finally continuing execution from the last checkpoint. This new paradigm has required rethinking programming models, operating systems, hardware and architecture design, tool creation, and evaluation techniques. In this talk, I will discuss the broad implications of what a battery-free, trillion-device IoT means, outline previous work on the topic, and then try to synthesize standard axioms and research frameworks from this work in the past decade– axioms that might guide (or be a starting point) for the next period of research in intermittent computing towards realizing a sustainable IoT.

Short Bio: Josiah Hester is the Allchin Chair and Associate Professor of Interactive Computing and Computer Science at Georgia Tech. His work focuses on reimagining computing for sustainability, specifically investigating battery-free embedded systems and intermittent computing, with applications in health, conservation, and interaction. Josiah was named a Sloan Fellow in Computer Science and won his NSF CAREER in 2022.

How to Enhance DNA Storage Capacity with A New Encoding Scheme

Title: How to Enhance DNA Storage Capacity with A New Encoding Scheme

Speaker: David Du

Abstract: Deoxyribonucleic Acid (DNA), with its ultra-high storage density and long durability, is a promising long-term archival storage medium and is attracting much attention today. A DNA storage system encodes and stores digital data with synthetic DNA sequences and decodes DNA sequences back to digital data via sequencing. Several studies have verified the feasibility of using DNA for archival storage with limited amounts of data. Since then, many encoding schemes have been proposed to enlarge DNA storage capacity by increasing DNA encoding density under certain bio-constraints. However, only increasing encoding density is insufficient because enhancing DNA storage capacity is a multifaceted problem. We assume that random accesses are necessary for practical DNA archival storage. We first identify major factors affecting DNA tube storage capacity under current technologies. We then investigate the practical DNA tube capacity with several popular encoding schemes. We find that the collisions between primers and DNA payload sequences severely limit the DNA tube capacity. Based on this discovery, we designed a new encoding scheme called Collision Reduction Code (CRC) to trade some encoding density for the reduction of primer-payload collisions. Compared with the best result among the five existing encoding schemes, CRC can extricate 132% more primers from collisions (i.e., usable primers) and increase the DNA tube capacity from 215.42 GB to 321.88 GB. Besides, we will discuss the challenges of studying DNA storage.

Short Bio: David H.C. Du – received his B.S. from National Tsing-Hua University in 1974 and the M.S. and Ph.D. degrees in computer science from the University of Washington, Seattle, in 1980 and 1981, respectively. He is currently the Qwest Chair Professor at the Computer Science and Engineering Department, University of Minnesota, Minneapolis and was the Director of NSF I/UCRC Center Research in Intelligent Storage from 2009 to 2021. He is an IEEE Fellow and a Fellow of Minnesota Supercomputing Institute. He has done research in cyber security, sensor networks, multimedia computing, storage systems, high-speed networking, high-performance computing, and database design and CAD for VLSI circuits. His current research focuses on storage technologies/systems and vehicular networks. He has authored and co-authored more than 350 technical papers, including 150 referred journal publications. He has also graduated 67 Ph.D. and 100+ M.S. students in the past.

The Mobility Penalty: 30 Years and Counting

Title: The Mobility Penalty: 30 Years and Counting

Speaker: Mahadev Satyanarayanan

Abstract: In a short September 1993 thought piece, I wrote “Regardless of future technological advances, a mobile unit’s weight, power, size and ergonomics will always render it less computationally capable than its static counterpart. While mobile elements will undoubtedly improve in absolute ability, they will always be at a relative disadvantage.” Looking back 30 years later, it is astonishing how consistently true this statement has remained. We refer to this irreducible gap as the “Mobility Penalty.” It is the price one pays simply for being a mobile computing device. In this brief talk, I will sketch a spectrum of approaches to overcoming the Mobility Penalty. At one extreme is offloading of compute-intensive operations to a cloudlet nearby. At the other extreme is the use of fixed-function hardware accelerators on mobile devices. Between these endpoints lie various configurations of programmable hardware accelerators. I will describe a path forward that combines the unique strengths of these design alternatives.

Short Bio: Satya’s multi-decade research career has focused on the challenges of performance, scalability, availability and trust in information systems that reach from the cloud to the mobile edge of the Internet. In the course of this work, he has pioneered many advances in distributed systems, mobile computing, pervasive computing, and the Internet of Things (IoT). Most recently, he has been viewed as “The Father of Edge Computing” for his seminal 2009 paper, and his pioneering contributions to the foundations of edge computing. Satya is the Jaime Carbonell University Professor of Computer Science at Carnegie Mellon University. He received the PhD in Computer Science from Carnegie Mellon, after Bachelor’s and Master’s degrees from the Indian Institute of Technology, Madras. He is a Fellow of the ACM and the IEEE.