Title: Digital Transformation of Academic Scientific Environments via IoT Systems

Speaker: Klara Nahrstedt, University of Illinois Urbana-Champaign

Abstract: Academic cleanrooms are special scientific environments on campuses where faculty, staff, postdocs, students from physical and life sciences meet and make their discoveries in materials, semiconductors, chip design and other scientific domains. Academic cleanrooms like many other environments (e.g., cities, manufacturing, homes) are going through major digital transformations. In this talk we will discuss the utility of Internet of Things (IoT) systems in Academic Cleanrooms as these systems are becoming an integral part of the digital transformation in academic cleanrooms. We will briefly present the academic cleanrooms’ difficulties that IoT system researchers must understand when researching, augmenting, designing, developing, and then deploying IoT systems in cleanrooms. We will then present the advances of IoT systems in academic cleanrooms that scientists can benefit from and increase their utility in form of speed of scientific innovation and efficiency of processes in academic cleanrooms.

Short Bio: Klara Nahrstedt is the Grainger Distinguished Chair in Engineering Professor in the Computer Science Department, and the Director of Coordinated Science Laboratory in the Grainger College of Engineering at the University of Illinois at Urbana-Champaign. Her research interests are directed toward end-to-end Quality of Service (QoS) and resource management in large scale multi-modal distributed  systems,  networks, and cyber-physical systems. She is the recipient of the IEEE Communication Society Leonard Abraham Award for Research Achievements, University Scholar, Humboldt Research Award, IEEE Computer Society Technical Achievement Award, ACM SIGMM Technical Achievement Award, TU Darmstadt Piloty Prize, and the Grainger College of Engineering Drucker Award. Klara Nahrstedt received her Diploma in Mathematics from Humboldt University, Berlin, Germany in 1985. In 1995, she received her PhD from the University of Pennsylvania in the Department of Computer and Information Science. She is ACM Fellow, IEEE Fellow, AAAS Fellow, Member of the German National Academy of Sciences (Leopoldina Society), and Member of the US National Academy of Engineering.

Title: Chameleon: A Large-Scale, Deeply Reconfigurable Testbed for Computer Science Systems Research

Speaker: Kate Keahey

Abstract: We live in interesting times: new ideas and technological opportunities emerge at ever increasing rate in disaggregated hardware, programmable networks, and the edge computing and IoT space to name just a few. These innovations require an instrument where they can be deployed and investigated, and where new solutions that those disruptive ideas require can be developed, tested, and shared. To support a breadth of Computer Science experiments  such instrument has to provide access to a diversity of hardware configurations, support deployment at scale, as well as deep reconfigrability so that a wide range of experiments can be supported. It also has to provide mechanisms for easy and direct sharing of repeatable digital artifacts so that new experiments and results can be easily replicated and help enable further innovation. Most importantly — since science does not stand still – such instrument requires the capability for constant adaptation to support an ever increasing range of experiments driven by emergent ideas and opportunities.

The NSF-funded Chameleon testbed (www.chameleoncloud.org) provides those capabilities. Specifically, they include access to a variety of hardware including cutting-edge architectures, a range of accelerators, storage hierarchies with a mix of large RAM, NVDIMMs, a variety of enterprise and consumer grade SDDs, HDDs, high-bandwidth I/0 storage, LiQid composable hardware, SDN-enabled networking hardware, and fast interconnects. This diversity was enlarged recently to add support for edge computing/IoT devices and will be further extended this year to include GigaIO composable hardware as well as P4 switches. Chameleon is distributed over two core sites at the University of Chicago and the Texas Advanced Computing Center (TACC) connected by 100 Gbps network – as well as four volunteer sites at IIT, NCAR, Northwestern University, and the University of Illinois in Chicago (UIC). Bare metal reconfigurability for Computer Science experiments is provided by CHameleon Infrastructure (CHI), based on an enhanced bare-metal flavor of OpenStack: it allows users to reconfigure resources at bare metal level, boot from custom kernel, and have root privileges on the machines. To date, the testbed has supported 8,000+ users and 1,000+ unique projects in research, education, and emergent applications.

In this talk, I will describe the goals and capabilities of the testbed, as well as some of the research and education projects our users are working on. I will also discuss our new thrusts in support for research on edge computing and IoT, our investment in developing and packaging of research infrastructure (CHI-in-a-Box), as well as our support for composable systems that can both dynamically integrate resources from other sources into Chameleon and make Chameleon resources available via other systems. Lastly, I will also outline the services and tools we created to support sharing of experiments, educational curricula, and other digitally expressed artifacts that allow science to be shared via active involvement and foster reproducibility.

Short Bio: Kate Keahey is one of the pioneers of infrastructure cloud computing. She created the Nimbus project, recognized as the first open source Infrastructure-as-a-Service implementation, and continues to work on research aligning cloud computing concepts with the needs of scientific datacenters and applications. To facilitate such research for the community at large, Kate leads the Chameleon project, providing a deeply reconfigurable, large-scale, and open experimental platform for Computer Science research. To foster the recognition of contributions to science made by software projects, Kate co-founded and serves as co-Editor-in-Chief of the SoftwareX journal, a new format designed to publish software contributions. Kate is a Scientist at Argonne National Laboratory and a Senior Fellow at the Computation Institute at the University of Chicago.

Title: Embracing Failure: Axioms and Future Directions of Intermittent Computing

Speaker: Josiah Hester

Abstract: For decades, smart devices (i.e., wireless sensing and computing systems) have relied primarily on battery power. Yet, batteries are bulky, expensive, high-maintenance, and unsustainable for the next trillion devices. Instead of relying on energy stored in a battery, the past decade has seen new approaches enabling battery-free, energy-harvesting smart devices. These devices compute intermittently, losing power, harvesting energy, restoring computational state, and finally continuing execution from the last checkpoint. This new paradigm has required rethinking programming models, operating systems, hardware and architecture design, tool creation, and evaluation techniques. In this talk, I will discuss the broad implications of what a battery-free, trillion-device IoT means, outline previous work on the topic, and then try to synthesize standard axioms and research frameworks from this work in the past decade– axioms that might guide (or be a starting point) for the next period of research in intermittent computing towards realizing a sustainable IoT.

Short Bio: Josiah Hester is the Allchin Chair and Associate Professor of Interactive Computing and Computer Science at Georgia Tech. His work focuses on reimagining computing for sustainability, specifically investigating battery-free embedded systems and intermittent computing, with applications in health, conservation, and interaction. Josiah was named a Sloan Fellow in Computer Science and won his NSF CAREER in 2022.

Title: How to Enhance DNA Storage Capacity with A New Encoding Scheme

Speaker: David Du

Abstract: Deoxyribonucleic Acid (DNA), with its ultra-high storage density and long durability, is a promising long-term archival storage medium and is attracting much attention today. A DNA storage system encodes and stores digital data with synthetic DNA sequences and decodes DNA sequences back to digital data via sequencing. Several studies have verified the feasibility of using DNA for archival storage with limited amounts of data. Since then, many encoding schemes have been proposed to enlarge DNA storage capacity by increasing DNA encoding density under certain bio-constraints. However, only increasing encoding density is insufficient because enhancing DNA storage capacity is a multifaceted problem. We assume that random accesses are necessary for practical DNA archival storage. We first identify major factors affecting DNA tube storage capacity under current technologies. We then investigate the practical DNA tube capacity with several popular encoding schemes. We find that the collisions between primers and DNA payload sequences severely limit the DNA tube capacity. Based on this discovery, we designed a new encoding scheme called Collision Reduction Code (CRC) to trade some encoding density for the reduction of primer-payload collisions. Compared with the best result among the five existing encoding schemes, CRC can extricate 132% more primers from collisions (i.e., usable primers) and increase the DNA tube capacity from 215.42 GB to 321.88 GB. Besides, we will discuss the challenges of studying DNA storage.

Short Bio: David H.C. Du – received his B.S. from National Tsing-Hua University in 1974 and the M.S. and Ph.D. degrees in computer science from the University of Washington, Seattle, in 1980 and 1981, respectively. He is currently the Qwest Chair Professor at the Computer Science and Engineering Department, University of Minnesota, Minneapolis and was the Director of NSF I/UCRC Center Research in Intelligent Storage from 2009 to 2021. He is an IEEE Fellow and a Fellow of Minnesota Supercomputing Institute. He has done research in cyber security, sensor networks, multimedia computing, storage systems, high-speed networking, high-performance computing, and database design and CAD for VLSI circuits. His current research focuses on storage technologies/systems and vehicular networks. He has authored and co-authored more than 350 technical papers, including 150 referred journal publications. He has also graduated 67 Ph.D. and 100+ M.S. students in the past.

Title: The Mobility Penalty: 30 Years and Counting

Speaker: Mahadev Satyanarayanan

Abstract: In a short September 1993 thought piece, I wrote “Regardless of future technological advances, a mobile unit’s weight, power, size and ergonomics will always render it less computationally capable than its static counterpart. While mobile elements will undoubtedly improve in absolute ability, they will always be at a relative disadvantage.” Looking back 30 years later, it is astonishing how consistently true this statement has remained. We refer to this irreducible gap as the “Mobility Penalty.” It is the price one pays simply for being a mobile computing device. In this brief talk, I will sketch a spectrum of approaches to overcoming the Mobility Penalty. At one extreme is offloading of compute-intensive operations to a cloudlet nearby. At the other extreme is the use of fixed-function hardware accelerators on mobile devices. Between these endpoints lie various configurations of programmable hardware accelerators. I will describe a path forward that combines the unique strengths of these design alternatives.

Short Bio: Satya’s multi-decade research career has focused on the challenges of performance, scalability, availability and trust in information systems that reach from the cloud to the mobile edge of the Internet. In the course of this work, he has pioneered many advances in distributed systems, mobile computing, pervasive computing, and the Internet of Things (IoT). Most recently, he has been viewed as “The Father of Edge Computing” for his seminal 2009 paper, and his pioneering contributions to the foundations of edge computing. Satya is the Jaime Carbonell University Professor of Computer Science at Carnegie Mellon University. He received the PhD in Computer Science from Carnegie Mellon, after Bachelor’s and Master’s degrees from the Indian Institute of Technology, Madras. He is a Fellow of the ACM and the IEEE.